512 bytes was the largest of the four GF 5V SRAM macros. I was thinking of expanding that to 1kB for another macro; shouldn't be too hard. But I'll get this one done first.
The SRAM block is now both DRC and LVS clean. I will work tomorrow on squeezing out additional space at the bottom and then I will push to the repository. Again, don't expect timing values at this point in the process.
Pushed an update today. I managed to squeeze some space out of it, but not as much as I originally thought I could; ultimately I recovered about 8um which is not terribly useful for having spent a full day and a half doing it. The final layout area is 301.3um x 321.89um. The fact that the height is now less than a TT slot height is purely coincidental, and probably meaningless. All digital pinouts are on the bottom side and there is only enough space in the TT slot to get maybe 9 routes in from the side, whereas the block has 36 digital I/O. It could be rotated 90 degrees but then the I/O are not in the preferred direction.
@Tim Edwards Well it would be easy enough to make a thin wrapper that brings the traces to the preferred routing direction ( and possibly adapts power rails so they connect nicely too ).
I thought about that but didn't do a feasibility study. : ) Yet.
Also: It's pretty easy to make the smaller SRAM versions, since GF used the same control block exactly, just removed a number of rows and grounded the upper address bits. The 256 byte SRAM is 301.3um x 224.93um. It took me less than 30 minutes to create the 256 byte layout from the 512 byte layout, but there are a couple of LVS errors I need to fix. I should be able to get that pushed before the end of the weekend.
@Tim Edwards Do you have a test slot planned for those ? Because I would love to have those validated in the first run, along with the split voltage IO lib since I'm planning to use those for the second tiny tapeout run ( and hopefully we'll have the results of the first run by then ).
@tnt : That was my plan. I should be able to get something out in a week. It won't be a very complex chip but I should be able to put together a simple "openframe" version of Caravel-GF using the mixed-voltage pads and drop some SRAMs in the middle along with some basic control logic and call it a day.
15:11
@urish : Maybe? What's the current support for 3.3V on TTGF?
@urish Well not really because there aren't power gates and I'd like to run comparison between 3.3v and 5v which means everything on there must support 5V without destroying the chip ...
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